ORC Documentations

last updated Dec 9, 2004
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ORC Tutorial

During MICRO-34, a workshop for ORC tutorial was given on Dec 1, 2001, Over 40+ researchers attended this workshop. A copy of ORC Tutorial can be found here:ORC-MICRO34-tutorial.pdf.

ORC team holds a BoF session at PLDI 2002. The presentations are available at <http://open64.sourceforge.net>.

ORC team gives a tutorial at PACT 2002. There are in-depth discussions on WOPT and IPA in addition to an update of CG and the overall status of ORC. A copy of the tutorial can be found here: ORC-PACT02-tutorial.pdf.

During Micro-35, ORC team gives a tutorial about the performance features in ORC 2.0, recent research activities and future plans. A copy of the tutorial can be found here: ORC-Micro35-tutorial.pdf.

During MICRO-36, a tutorial for ORC was given on Dec 1, 2003. A copy of ORC Tutorial can be found here:ORC-MICRO36-tutorial.pdf.

During MICRO-37, a tutorial for ORC was given on Dec 5, 2004. A copy of ORC Tutorial can be found here:ORC-MICRO37-tutorial.ppt.

ORC Specific Documentation

  1. A coding style guideline for ORC can be found here.

  2. Patch for building ORC2.1 by gcc3.x can be found here.

Papers

  1. R. D.-C. Ju, K. Nomura, U. Mahadevan, and L.-C. Wu, "A Unified Compiler Framework for Control and Data Speculation," Proc. of 2000 Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT), pp. 157 - 168, Oct. 2000.

  2. U. Mahadevan, K. Nomura, R. D.-C. Ju, and Rick Hank,"Applying Data Speculation in Modulo Scheduled Loops," Proc. of 2000 Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT), pp. 169 - 176, Oct. 2000. 

  3. Guang Gao, Jose Nelson Amaral, James C. Dehnert, and Ross A. Towle, Tutorial on The SGI Pro64 Compiler Infrastructure, PACT 2000: Int'l Conf. on Parallel Architectures and Compilation: http://www.cs.ualberta.ca/~amaral/Pro64/index.html

  4. Dong-Yuan Chen, Lixia Liu, Chen Fu, Shuxin Yang, Chengyong Wu, and Roy Ju, "Efficient Resource Management during Instruction Scheduling for the EPIC Architecture" accepted by 2003 Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT), Oct. 2003.

  5. L. Yang, S. Chan, G.R. Gao, R. Ju, G.-Y. Lueh, and Z. Zhang, "Inter-procedural Stacked Register Allocation for Itanium-like Architecture," Proc. of 2003 Int'l Conference on Supercomputing (ICS), pp. 215-225, June 2003.

  6. Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Ju, Tin-fook Ngai, and Sun Chan, "A Compiler Framework for Speculative Analysis and Optimizations" Proc. of the ACM SIGPLAN'03 Conference on Programming Language Design and Implementation (PLDI), pp. 289-299, June 2003.

  7. Y. Liu, Z. Zhang, R. Qiao, and R. Ju, "A Region-Based Compilation Infrastructure" Proc. of the 7th Workshop on Interaction between Compilers and Computer Architectures, Feb. 2003.


Pro64 bibliography

This bibliography is part of original Pro64 documentation. Papers marked with [*] are also directly implemented in the compiler.

Code Generation

[LCCL94]
Raymond Lo, Sun Chan, Fred Chow and Shin-Ming Liu, Improving Resource Utilization of the MIPS R8000 via Post-Scheduling Global Instruction Distribution, MICRO-27, 30 November - 2 December 1994, pp. 148-152.
[RGSL96]
John Ruttenberg, Guang Gao, A. Stoutchinin, and Woody Lichtenstein, Software Pipelining Showdown: Optimal vs. Heuristic Methods in a Production Compiler, SIGPLAN '96 Conf. on Programming Language Design and Implementation, May 1996, pp. 1-11.
[LCDT96]
Raymond Lo, Sun Chan, Jim Dehnert, and Ross Towle, Aggregate Operation Movement: a Min-Cut Approach to Global Code Motion, Proc. of Euro-Par'96, August 1996, vol. II, pp. 801-814 (distinguished paper award). To appear in J. Theoretical Computer Science.
[SrNi98]
M. Srinivas and Alexandru Nicolau, Analyzing the Individual/Combined Effects of Speculative and Guarded Execution on a Superscalar Architecture, Proc. of 12th Int'l Parallel Processing Symp., 30 March - 3 April 1998, pp. 199-208.
[SrJD98] *
M. Srinivas, Suneel Jain, and Jim Dehnert, A New Framework for Integrated Global Local Scheduling, Proc. of Int'l Conf. on Parallel Architectures and Compilation Technology, 14-16 October 1998.
[MaNi99]
Srinivas Mantripragada and Alexandru Nicolau, Selective Guarded Execution Using Profiling on a Dynamically Scheduled Processor, accepted (but not presented) at the Workshop on Feedback-Directed Optimization, 15 November 1999, Haifa, Israel. pp. 199-208.
[FoDe99]
Efraim Fogel and James C. Dehnert, A Code Motion Technique for Scheduling Bottleneck Resources, Proc. of the Workshop on Media Processors and DSPs, 15 November 1999, Haifa, Israel.

SSA

[CLLSC96] *
Fred Chow, Raymond Lo, Shin-Ming Liu, Sun Chan, and Mark Streich, Effective Representation of Aliases and Indirect Memory Operations in SSA Form, Proc. of 6th Int'l Conf. on Compiler Construction, April 1996, pp. 253-257 (distinguished paper award).
[LiLC96] *
Shin-Ming Liu, Raymond Lo, and Fred Chow, Loop Induction Variable Canonicalization in Parallelizing Compilers, Proc. of PACT'96, October 1996, pp. 228-237.
[CCKLLT97] *
Fred Chow, Sun Chan, Robert Kennedy, Shin-Ming Liu, Raymond Lo, and Peng Tu, A New Algorithm for Partial Redundancy Elimination Based on SSA Form, Proc. of SIGPLAN '97 Conf. on Programming Language Design and Implementation, May 1997, pp. 273-286.
[KCDLLS98] *
Robert Kennedy, Fred Chow, Peter Dahl, Shin-Ming Liu, Raymond Lo, and Mark Streich, Strength Reduction via SSAPRE, Int'l Conf. on Compiler Construction (CC '98), Lisbon, Portugal, March 30, 1998.
[LCKLT98] *
Raymond Lo, Fred Chow, Robert Kennedy, Shin-Ming Liu, and Peng Tu, Register Promotion by Sparse Partial Redundancy Elimination of Loads and Stores, Proc. of SIGPLAN '98 Conf. on Programming Language Design and Implementation, June 17-19, 1998.
[KCLLTC99] *
Robert Kennedy, Sun Chan, Shin-Ming Liu, Raymond Lo, Peng Tu, and Fred Chow, Partial Redundancy Elimination in SSA Form, TOPLAS 21(3), May 1999, pp. 627-676.
Loop Nest Optimization
[WoMC96] *
Michael E. Wolf, Dror E. Maydan, and Ding-Kai Chen, Combining Loop Transformations Considering Caches and Scheduling, MICRO-29, December 1996, pp. 274-286. 
[CCCMNA97] *
Rohit Chandra, Ding-Kai Chen, Robert Cox, Dror Maydan, Nenad Nedeljkovic, and Jennifer Anderson, Data Distribution Support on Distributed Shared Memory Multiprocessors, SIGPLAN '97 Conf. on Programming Language Design and Implementation, May 1997, pp. 334-345.
[WoMC98] *
Michael E. Wolf, Dror E. Maydan, and Ding-Kai Chen, Combining Loop Transformations Considering Caches and Scheduling, Int'l J. of Parallel Programming 26(4), August 1998, pp. 479-503.

Other

[HoCL95] *
W. Wilson Ho, Wei-Chau Chang, and Lilian H. Leung, Optimizing the Performance of Dynamically-Linked Programs, Proc. of the USENIX Conference, 16-20 January 1995, pp. 225-233. 
[AuTS96]
Matthew Austern, Ross Towle, and Alexander Stepanov, Range Partition Adapters: A Mechanism for Parallelizing STL, Applied Computing Review 4(1), Spring 1996, pp. 5-6.
[Boehm96]
H. Boehm, Simple Garbage-Collector Safety, SIGPLAN '96 Conf. on Programming Language Design and Implementation, June 1996.
[Suresh97]
S. Suresh, jCITE, Java for Science and Engineering Computation, June 1997.
[Austern97]
Matthew Austern, The SGI Standard Template Library, Dr. Dobbs Journal, August 1997.
[CiSr97]
M. Cierniak and Suresh Srinivas, A Portable Browser for Performance Programming, Concurrency: Practice and Experience, 1997.
[Austern98a]
Matthew Austern, Making the World Safe for Exceptions, C++ Report, January 1998.
[DeSt98]
James C. Dehnert and Alexander Stepanov, Fundamentals of Generic Programming, Dagstuhl Seminar on Generic Programming, 27 April - 1 May 1998, Schloss Dagstuhl, Wadern, Germany. To appear in a volume of the Springer Verlag Lecture Notes in Computer Science (LNCS) series.
[Austern98b]
Matthew Austern, Generic Programming and the STL, Addison-Wesley, ISBN 0-201-30956-4, 1998.